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| Thought Paper |
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Design and Implementation of High- Speed Digital Equalizer |
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| Abstract |
For more than a decade, the global demands for voice and data communications have been growing at a phenomenal rate. Today there is a strong and constantly growing demand for reliable communication over the last-mile to the home at low-cost and highspeed.
DSL technologies are now being used to offer higher bit rates over the copper pair. Other applications include data communication over power lines, making noise immunity even more critical for high-speed operation. These new applications employ advanced modem technologies capable of achieving high bandwidth data transmission.
This Paper presents the challenges and solutions for designing an adaptive digital equalizer (DEQ) for high-speed modems and discusses an example of an FPGA-based implementation of a prototype system.
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